IEC 61943:1999 pd download - lntegrated circuits - Manufacturing line approval application guideline

IEC 61943:1999 pd download – lntegrated circuits – Manufacturing line approval application guideline

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IEC 61943:1999 pd download – lntegrated circuits – Manufacturing line approval application guideline.
IEC 61943 defines how to apply the principles and requirements given in IEC 61739 to monolithic integrated circuits The standard is applicable to those manufacturers of integrated circuits (ICs) wtio apply for manufacturing line approval
The objective of this applicators guideline Is to establish consistency in the requirements used by manufacturers and auditors for techniques related to integrated circuit manufacturing.
Each manufacturer may use his own methods for satisfying the requirements of this standard, provided that the required level of control in the manufacturing line is reached.
1.2 Normative reference
The following normative document contains provisions which, through reference in this text, constitute provisions of this international Standard. For dated references, subsequent amendments to, or revisions of, this publication do not apply. However, parties to agreements based on this International Standard are encouraged to investigate the possibility of applying the most recent editions of the normative document indicated below. For undated references. the latest edition of the normative document referred to applies. Members of IEC and ISO maintain registers of currently valid International Standards.
IEC 6 t 739:1996, Integrated circuits — Procedures for manufacturing line approval and quality management
2 Definitions
For the purpose of this Guideline the following definitions apply (see 1.4 of IEC 61739):
demonstration vehicle
normal product or product specifically designed to demonstrate that all critical ptocess parameters are under control and repeatab’e within the defined technology
parametric monitor (PM)
structure for measuring electrical parameters
qualified manufacturer list QML
list used for the pocedure associated with manufacturing line approval as defined in
IEC 61739
standard evaluation component (SEC)
structure used to monitor the fabrication process and to serve as a surrogate product for reliability testing and failure rate evaluation. It can be an actual device of the technology under consideration
activity or sequence of activities that form a stage in manufacturing the product
technological vehicle (TV)
hybrid structure that demonstrates process repeatability and involved characteristics
technology characterization vehicle (TCV)
structure to study intrinsic failure mechanisms and their distribution
technology review board (TRB) or equivalent organization
primary organization for the manufacturing line or task. A TRB will consist of representatives of all functions described in total quality management (TOM) Plan, such as marketing, sales. design, technology development, fabrication, testing and quality assurance as applicable
3 Principles for qualified manufacturer list (OML) approval
OMI listed manufacturers shall be able to produce products utilizing an approved manufacturing line without the need for extensive qualification testing and end-of-manufacturing quality conformance inspections on each product.
The primary organization for control of the qualified manulacturing line shall be the TRB or equivalent organization.
The qualifying manufacturer shall ensure and document that any tasks to be performed by a subcontractor meet the requirements of IEC 61739.
As the technology matures and reliability and quality data are accumulated, the manufacturer. through the total quality management (TOM) plan and technology review board (TRB) may modify, substitute or delete tests and/or Screens. The national supervising inspectorate (NSI) shall be notified of such actions through the status report.
3.1 IdentifIcation and definition of tasks
This guideline identifies six tasks with interfaces which detail the specific requirements for the design and manufacturing of ICs.
3.1.1 Process design (see clause 4)
This is the design of the semiconductor process including modification and publication of the process parameters and related process design rules in the form of written text andor computer tiles.

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